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8 Mbit LPC Flash
A Microchip Technology Company
SST49LF080A
Data Sheet
Parallel Programming Mode
Device Operation
Commands are used to initiate the memory operation functions of the device. The data portion of the
software command sequence is latched on the rising edge of WE#. During the software command
sequence the row address is latched on the falling edge of R/C# and the column address is latched on
the rising edge of R/C#.
Reset
Driving the RST# low will initiate a hardware reset of the SST49LF080A. See Table 25 for Reset timing
parameters and Figure 17 for Reset timing diagram.
Read
The Read operation of the SST49LF080A device is controlled by OE#. OE# is the output control and is
used to gate data from the output pins. Refer to the Read cycle timing diagram, Figure 18, for further
details.
Byte-Program Operation
The SST49LF080A device is programmed on a byte-by-byte basis. Before programming, one must
ensure that the sector in which the byte is programmed is fully erased. The Byte-Program operation is
initiated by executing a four-byte command load sequence for Software Data Protection with address
(BA) and data in the last byte sequence. During the Byte-Program operation, the row address (A 10 -A 0 )
is latched on the falling edge of R/C# and the column address (A 21 -A 11 ) is latched on the rising edge of
R/C#. The data bus is latched on the rising edge of WE#. The Program operation, once initiated, will
be completed, within 20 μs. See Figure 22 for Program operation timing diagram and Figure 34 for its
flowchart. During the Program operation, the only valid reads are Data# Polling and Toggle Bit. During
the internal Program operation, the host is free to perform additional tasks. Any commands written dur-
ing the internal Program operation will be ignored.
Sector-Erase Operation
The Sector-Erase operation allows the system to erase the device on a sector-by-sector basis. The
sector architecture is based on uniform sector size of 4 KByte. The Sector-Erase operation is initiated
by executing a six-byte command load sequence for Software Data Protection with Sector-Erase com-
mand (30H) and sector address (SA) in the last bus cycle. The internal Erase operation begins after
the sixth WE# pulse. The End-of-Erase can be determined using either Data# Polling or Toggle Bit
methods. See Figure 23 for Sector-Erase timing waveforms. Any commands written during the Sector-
Erase operation will be ignored.
Block-Erase Operation
The Block-Erase Operation allows the system to erase the device in 64 KByte uniform block size for
the SST49LF080A. The Block-Erase operation is initiated by executing a six-byte command load
sequence for Software Data Protection with Block-Erase command (50H) and block address. The
internal Block-Erase operation begins after the sixth WE# pulse. The End-of-Erase can be determined
using either Data# Polling or Toggle Bit methods. See Figure 24 for Block-Erase timing waveforms. Any
commands written during the Block-Erase operation will be ignored.
?2011 Silicon Storage Technology, Inc.
17
DS25086A
11/11
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